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" Practical design verification / "
edited by Dhiraj K. Pradhan, Ian G. Harris.
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BL
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| Record Number
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1014749
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| Doc. No
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b769119
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| Title & Author
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Practical design verification /\ edited by Dhiraj K. Pradhan, Ian G. Harris.
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| Publication Statement
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Cambridge, U.K. ;New York :: Cambridge University Press,, 2009.
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| Page. NO
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1 online resource (xi, 276 pages) :: illustrations
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| ISBN
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0511580061
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: 0511626916
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: 0511650914
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: 9780511580062
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: 9780511626913
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: 9780511650918
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0521859727
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9780521859721
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| Notes
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Title from title screen.
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| Bibliographies/Indexes
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Includes bibliographical references and index.
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| Contents
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Model checking and equivalence checking / Masahiro Fujita -- Transaction-level system modeling / Daniel Gajski and Samar Abdi -- Response checkers, monitors, and assertions / Harry Foster -- System debugging strategies / Wayne H. Wolf -- Test generation and coverage metrics / Ernesto Sánchez, Giovanni Squillero, and Matteo Sonza Reorda -- SystemVerilog and Vera in a verification flow / Shireesh Verma and Ian G. Harris -- Decision diagrams for verification / Maciej Ciesielski, Dhiraj K. Pradhan, and Abusaleh M. Jabir -- Boolean satisfiability and EDA applications / Joao Marques-Silva.
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| Abstract
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Improve design efficiency and reduce costs with this practical guide to formal and simulation-based functional verification. Giving you a theoretical and practical understanding of the key issues involved, expert authors including Wayne Wolf and Dan Gajski explain both formal techniques (model checking, equivalence checking) and simulation-based techniques (coverage metrics, test generation). You get insights into practical issues including hardware verification languages (HVLs) and system-level debugging. The foundations of formal and simulation-based techniques are covered too, as are more recent research advances including transaction-level modeling and assertion-based verification, plus the theoretical underpinnings of verification, including the use of decision diagrams and Boolean satisfiability (SAT).
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| Subject
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Integrated circuits-- Verification.
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| Subject
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Integrated circuits-- Verification.
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| Subject
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TECHNOLOGY ENGINEERING-- Electronics-- Circuits-- General.
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| Subject
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TECHNOLOGY ENGINEERING-- Electronics-- Circuits-- Integrated.
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| Dewey Classification
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621.3815/48
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| LC Classification
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TK7874.58.P73 2009eb
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| Added Entry
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Harris, Ian G.
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Pradhan, Dhiraj K.
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