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" Comprehensive functional verification the complete industry cycle / "
Bruce Wile, John C. Goss, Wolfgang Roesner.
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BL
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| Record Number
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1029734
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b784104
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| Main Entry
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Wile, Bruce.
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| Title & Author
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Comprehensive functional verification the complete industry cycle /\ Bruce Wile, John C. Goss, Wolfgang Roesner.
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| Publication Statement
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Amsterdam ;Boston :: Elsevier/Morgan Kaufmann,, ©2005.
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| Series Statement
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Morgan Kaufmann series in systems on silicon
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| Page. NO
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1 online resource (xiii, 676 pages) :: illustrations.
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| ISBN
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0080476643
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: 0127518037
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: 1423722337
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: 9780080476643
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: 9780127518039
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: 9781423722335
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0127518037
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| Bibliographies/Indexes
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Includes bibliographical references (pages 657-662) and index.
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| Contents
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Cover -- Author Bios -- FOREWORD -- Table of contents -- PREFACE -- THE VERIFICATION CYCLE -- STRUCTURE OF THE BOOK -- BASIC KNOWLEDGE NEEDED FOR THIS BOOK -- EXERCISES AND SUPPORTING MATERIALS -- ACKNOWLEDGEMENTS -- PART I: INTRODUCTION TO VERIFICATION -- CHAPTER 1: VERIFICATION IN THE CHIP DESIGN PROCESS -- 1.1 INTRODUCTION TO FUNCTIONAL VERIFICATION -- 1.2 THE VERIFICATION CHALLENGE -- 1.3 MISSION AND GOALS OF VERIFICATION -- 1.4 COST OF VERIFICATION -- 1.5 AREAS OF VERIFICATION BEYOND THE SCOPE OF THIS BOOK -- 1.6 THE VERIFICATION CYCLE: A STRUCTURED PROCESS -- 1.7 SUMMARY -- 1.8 EXERCISES -- CHAPTER 2: VERIFICATION FLOW -- 2.1 VERIFICATION HIERARCHY -- 2.2 STRATEGY OF VERIFICATION -- 2.3 SUMMARY -- 2.4 EXERCISES -- CHAPTER 3: FUNDAMENTALS OF SIMULATION-BASED VERIFICATION -- 3.1 BASIC VERIFICATION ENVIRONMENT: A TEST BENCH -- 3.2 OBSERVATION POINTS: BLACK-BOX, WHITE-BOX, AND GREY-BOX VERIFICATION -- 3.3 ASSERTION-BASED VERIFICATION: AN OVERVIEW -- 3.4 TEST BENCHES AND TESTING STRATEGIES -- 3.5 SUMMARY -- 3.6 EXERCISES -- CHAPTER 4: THE VERIFICATION PLAN -- 4.1 THE FUNCTIONAL SPECIFICATION -- 4.2 THE EVOLUTION OF THE VERIFICATION PLAN -- 4.3 CONTENTS OF THE VERIFICATION PLAN -- 4.4 VERIFICATION EXAMPLE: CALC1 -- 4.5 SUMMARY -- 4.6 EXERCISES -- PART II: SIMULATION-BASED VERIFICATION -- CHAPTER 5: HARDWARE DESCRIPTION LANGUAGES AND SIMULATION ENGINES -- 5.1 HARDWARE DESCRIPTION LANGUAGES -- 5.2 SIMULATION ENGINES: INTRODUCTION -- 5.3 EVENT-DRIVEN SIMULATION -- 5.4 IMPROVING SIMULATION THROUGHPUT -- 5.5 CYCLE-BASED SIMULATION -- 5.6 WAVEFORM VIEWERS -- 5.7 SUMMARY -- 5.8 EXERCISES -- CHAPTER 6: CREATING ENVIRONMENTS -- 6.1 TEST BENCH WRITING TOOLS -- 6.2 VERIFICATION COVERAGE -- 6.3 SUMMARY -- 6.4 EXERCISES -- CHAPTER 7: STRATEGIES FOR SIMULATION-BASED STIMULUS GENERATION -- 7.1 CALC2 OVERVIEW -- 7.2 STRATEGIES FOR STIMULUS GENERATION -- 7.3 SUMMARY -- 7.4 EXERCISES -- CHAPTER 8: STRATEGIES FOR RESULTS CHECKING IN SIMULATION-BASED VERIFICATION -- 8.1 TYPES OF RESULT CHECKING -- 8.2 DEBUG -- 8.3 SUMMARY -- 8.4 EXERCISES -- CHAPTER 9: PERVASIVE FUNCTION VERIFICATION -- 9.1 SYSTEM RESET AND BRING-UP -- 9.2 ERROR AND DEGRADED MODE HANDLING -- 9.3 VERIFYING HARDWARE DEBUG ASSISTS -- 9.4 LOW-POWER MODE VERIFICATION -- 9.5 SUMMARY -- 9.6 EXERCISES -- CHAPTER 10: RE-USE STRATEGIES AND SYSTEM SIMULATION -- 10.1 RE-USE STRATEGIES -- 10.2 SYSTEM SIMULATION -- 10.3 BEYOND GENERAL-PURPOSE LOGIC SIMULATION -- 10.4 SUMMARY -- 10.5 EXERCISES -- PART III: FORMAL VERIFICATION -- CHAPTER 11: INTRODUCTION TO FORMAL VERIFICATION -- 11.1 FOUNDATIONS -- 11.2 FORMAL BOOLEAN EQUIVALENCE CHECKING -- 11.3 FUNCTIONAL FV-PROPERTY CHECKING -- 11.4 SUMMARY -- 11.5 EXERCISES -- CHAPTER 12: USING FORMAL VERIFICATION -- 12.1 PROPERTY SPECIFICATION USING AN HDL LIBRARY -- 12.2 THE PROP.
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| Subject
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Computer engineering.
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Integrated circuits-- Verification.
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Computer engineering.
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COMPUTERS-- Logic Design.
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Integrated circuits-- Verification.
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TECHNOLOGY ENGINEERING-- Electronics-- Circuits-- Logic.
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TECHNOLOGY ENGINEERING-- Electronics-- Circuits-- VLSI ULSI.
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| Dewey Classification
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621.395
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| LC Classification
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TK7874.58.W55 2005eb
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| Added Entry
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Goss, John C.
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Roesner, W., (Wolfgang)
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