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Document Type:Latin Dissertation
Language of Document:English
Record Number:54335
Doc. No:TL24289
Call number:‭MR25367‬
Main Entry:Mohammad Salamat
Title & Author:Reconfigurable communication protocol generatorMohammad Salamat
College:University of New Brunswick (Canada)
Date:2005
Degree:M.Sc.E.
student score:2005
Page No:91
Abstract:In this project, a communication protocol generation package is developed and tested. This program generates test signals for different communication protocols. It consists of a batch file generator, test signal generator, and communication protocol generator scripts written in PERL language. The batch file generator uses the protocol processor batch file to construct the protocol generator batch file. The protocol generator batch file creates a VHDL circuit for generating a communication protocol. The test signal generator produces the necessary signals for verification of the VHDL circuit. The communication protocol generator scripts are comprised of several PERL modules to construct VHDL circuits for generating a protocol. The generator batch file for each communication protocol contains a list of generator PERL scripts. Each of these PERL scripts generates a part of the VHDL circuit required to generate the communication signal. These VHDL circuits are wired together as specified in the batch file to create the final VHDL circuit. This final VHDL circuit is the protocol generator for the protocol specified in the generator batch file. The final VHDL circuit for the protocol generator is implemented and converted to a bit file using the Xilinx Foundation Software. This bit file is used to configure the Xilinx FPGA chip as a communication protocol generator.
Subject:Applied sciences; Electrical engineering; Computer science; 0984:Computer science; 0544:Electrical engineering
Added Entry:University of New Brunswick (Canada)