رکورد قبلیرکورد بعدی

" Designing 2D and 3D network-on-chip architectures "


Document Type : BL
Record Number : 574300
Doc. No : b403519
Main Entry : Tatas, Konstantinos.
Title & Author : Designing 2D and 3D network-on-chip architectures\ Konstantinos Tatas [and three others].
Publication Statement : New York :: Springer,, [2014]
ISBN : 9781461442745
: : 9781461442738
Bibliographies/Indexes : Includes bibliographical references.
Contents : Part I: Network-on-Chip Design Methodology -- Network-on-Chip Technology: A Paradigm Shift -- NoC Modeling and Topology Exploration -- Communication Architecture -- Power and Thermal Effects and Management -- NoC-based System Integration -- NoC Verification and Testing -- The Spidergon STNoC -- Middleware Memory Management in NoC -- On Designing 3-D Platforms -- The SYSMANTIC NoC Design and Prototyping Framework -- Part II: Suggested Projects.- Projects on Network-on Chip.
Subject : Computer network architectures.
Subject : Computer science.
Subject : Electronics.
Subject : Systems engineering.
Added Entry : SpringerLink (Online service).
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