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BL
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| Record Number
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602268
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| Doc. No
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b431487
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| Main Entry
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Gu, Changyi
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| Title & Author
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Building embedded systems : : programmable hardware /\ Changyi Gu
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| Page. NO
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1 online resource (xxi, 322 pages) :: color illustrations
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| ISBN
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9781484219195
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: 1484219198
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9781484219188
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| Notes
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Includes index
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| Contents
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At a Glance; Contents; About the Author; About the Technical Reviewer; Acknowledgments; Introduction; Chapter 1: The Whole Picture; Organization of the Book; Companion Materials for this Book; References; Chapter 2: Power On and Bootloader; What Happens After Powering On; What Does Bootloader Do?; User Image (ROM Image); Image of Embedded OS; Image of Object File; a.out, COFF, and ELF; Sections of the ELF Format; Link Script; Defining the Memory in the Target System; Determining the Address of Each Section in the Object File; Flash Image and XIP (Execute In Place)
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C Runtime Library and C Standard LibraryVMA and LMA; Flash Memory; Burn the Flash (PROM Program); NOR Flash and NAND Flash; Pre-Loader; Flash File System; RomFS, CramFS, and SquashFS; JFFS2, YAFFS2, and UBIFS; Summary; References; Chapter 3: Inside the CPU; Von Neumann Architecture and Memory Barrier; Harvard Architecture, Modified Harvard Architecture; CISC and RISC; SIMD/VLIW; CPU Debugging; CPU Simulator; ROM Monitor; Introduction to ICE (In Circuit Emulator); Non-JTAG ICE; JTAG-Based ICE; Using Breakpoints; Software Breakpoints; Hardware Breakpoints; Trace; Summary; References
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Chapter 4: RAM, DMA, and InterruptTypes of Random Access Memory; NVRAM (Non-Volatile Random Access Memory); Traditional SRAM: Intel 8080 vs. Motorola 6800; DDR SDRAM (Dual Date Rate Synchronous Dynamic RAM); QDR SRAM1; Other Types of RAM; PIO and DMA; PIO; DMA and MMU; Memory Allocation for DMA; Cache/Write Buffer and Memory Incoherence; Interrupt; Interrupt Mechanism; Shared Interrupt; Edge Triggered Interrupt and Level Triggered Interrupt; Push-Pull and Open Drain (or Open Collector); VIC (Vectored Interrupt Controller); Interrupt from Watchdog Timer; Message Signaled Interrupt (MSI)
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Implementing the USB Device Driver (for the Host OS)Ethernet; Overview; Hardware Implementation; Standalone Ethernet Controller; Separate MAC and PHY; Ethernet Software and Flow Control; Summary; References; Chapter 6: Firmware Coding in C; Overview; The Confusion of Tongues; Firmware Coding in the C Language; Explicit Type of Bit-Width; Align the Data Structure; Debug Print; Compile Time Assertion; Volatile, Const, and Peripheral Registers; Type-Qualifier "volatile"; Type-Qualifier "const"; Access Peripheral Registers; Atomic Operation and Critical Section; Finite State Machine
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| Abstract
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References; Chapter 5: Bus Architecture; Bus with System Synchronous Timing; Bus with Source Synchronous Timing; From Parallel Bus to Serial Bus; The Drawbacks of Parallel Bus; The Benefit of Differential Serial Link; Implementation of Differential Serial Link; Out-of-band Clocking; Embedded Clocking; 8b/10b Encoding and Signal Conditioning; Bus Standards; RS-232; I2C and SMBus; SPI; PCI overview; Driver for PCI Device; USB overview; USB device implementation; Selecting the Hardware Component; Implementing the USB firmware; Setting Up Endpoints; Handling Request/Prepare Descriptors
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| Subject
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Embedded computer systems-- Programming
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| Dewey Classification
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006.2/2
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| LC Classification
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TK7895.E42
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| Added Entry
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Ohio Library and Information Network
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