|
" Integrated circuit and system design : "
José L. Ayala [and others] (editions.)
| Document Type
|
:
|
BL
|
| Record Number
|
:
|
605018
|
| Doc. No
|
:
|
b434237
|
| Main Entry
|
:
|
PATMOS (Workshop)(21st :2011 :, Madrid, Spain)
|
| Title & Author
|
:
|
Integrated circuit and system design : : power and timing modeling, optimization, and simulation : 21st international workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011 : proceedings /\ José L. Ayala [and others] (editions.)
|
| Series Statement
|
:
|
Lecture notes in computer science,; 6951
|
|
|
:
|
LNCS sublibrary. SL 1, Theoretical computer science and general issues
|
| Page. NO
|
:
|
1 online resource (xi, 352 pages) :: illustrations
|
| ISBN
|
:
|
9783642241543
|
|
|
:
|
: 3642241549
|
|
|
:
|
: 3642241530
|
|
|
:
|
: 9783642241536
|
|
|
:
|
9783642241536
|
| Bibliographies/Indexes
|
:
|
Includes bibliographical references and author index
|
| Abstract
|
:
|
This book constitutes the refereed proceedings of the 21st International Conference on Integrated Circuit and System Design, PATMOS 2011, held in Madrid, Spain, in September 2011. The 34 revised full papers presented were carefully reviewed and selected from numerous submissions. The paper feature emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems and focus especially on timing, performance and power consumption as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization
|
| Subject
|
:
|
Integrated circuits-- Design and construction, Congresses
|
| Dewey Classification
|
:
|
621.3815
|
| LC Classification
|
:
|
TK7874.P38 2011eb
|
| Added Entry
|
:
|
Ayala, Jose L
|
| Parallel Title
|
:
|
PATMOS 2011
|
| |