SystemVerilog for design :

" SystemVerilog for design : "
by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby

Document Type	:	BL
Record Number	:	627639
Doc. No	:	dltt
Main Entry	:	Sutherland, Stuart,1953-
Title & Author	:	SystemVerilog for design : : a guide to using SystemVerilog for hardware design and modeling /\ by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby
Edition Statement	:	2nd ed
Publication Statement	:	New York :: Springer,, 2006
Page. NO	:	xxx, 418 p. :: ill. ;; 25 cm
ISBN	:	0387333991
Bibliographies/Indexes	:	Includes bibliographical references and index
Subject	:	Verilog (Computer hardware description language)
Subject	:	Electronic digital computers-- Design and construction
Subject	:	Computer simulation
LC Classification	:	‭TK7885.7‬‭.S876 2006‬
Added Entry	:	Davidmann, Simon
	:	Flake, Peter

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