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"
Turbo decoder architecture for beyond-4G applications /
"
Cheng-Chi Wong, Hsie-Chia Chang.
Document Type
:
BL
Record Number
:
644095
Doc. No
:
dltt
Main Entry
:
Wong, Cheng-Chi.
Title & Author
:
Turbo decoder architecture for beyond-4G applications /\ Cheng-Chi Wong, Hsie-Chia Chang.
Page. NO
:
1 online resource (online resource (viii, 100 pages)) :: illustrations
ISBN
:
1461483107
:
: 9781461483106
:
9781461483090
Contents
:
Conventional Architecture of Turbo Decoder -- Turbo Decoder with Parallel Processing -- Low-Complexity Solution for Highly Parallel Architecture -- High Efficiency Solution for Highly Parallel Architecture
Abstract
:
This book describes the most recent techniques for turbo decoder implementation, especially for 4G and beyond 4G applications. The authors reveal techniques for the design of high-throughput decoders for future telecommunication systems, enabling designers to reduce hardware cost and shorten processing time. Coverage includes an explanation of VLSI implementation of the turbo decoder, from basic functional units to advanced parallel architecture. The authors discuss both hardware architecture techniques and experimental results, showing the variations in area/throughput/performance with respect to several techniques
Subject
:
Long-Term Evolution (Telecommunications)
Subject
:
Optical fiber communication.
Subject
:
Signal processing-- Digital techniques.
Subject
:
Wireless communication systems.
Subject
:
4G applications.
Dewey Classification
:
621.3981
LC Classification
:
TK5105.775.W384 2013
Added Entry
:
Chang, Hsie-Chia.
Added Entry
:
Ohio Library and Information Network.
https://lib.clisel.com/site/catalogue/644095
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