رکورد قبلیرکورد بعدی

" System level ESD co-design / "


Document Type : BL
Record Number : 662273
Doc. No : dltt
Main Entry : Duvvury, Charvaka,1944-
Title & Author : System level ESD co-design /\ Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany
Series Statement : Wiley - IEEE
Page. NO : 1 online resource.
ISBN : 9781118861899
: : 1118861892
: 9781118861882
: 1118861884
: 9781118861844
: 1118861841
: 9781118861905 (hardback)
Bibliographies/Indexes : Includes bibliographical references and index
Contents : Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index
Abstract : "Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"--
Subject : Shielding (Electricity)
Subject : Electronic apparatus and appliances-- Design and construction.
Subject : Integrated circuits-- Design and construction.
Subject : Integrated circuits-- Protection.
Subject : Electrostatics.
Subject : Static eliminators.
Dewey Classification : ‭537/.2‬
LC Classification : ‭TK7867.8‬
Added Entry : Gossner, Harald.
Added Entry : Ohio Library and Information Network.
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