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" System level ESD co-design / "
Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany
Document Type
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BL
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Record Number
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662273
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Doc. No
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dltt
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Main Entry
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Duvvury, Charvaka,1944-
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Title & Author
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System level ESD co-design /\ Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany
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Series Statement
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Wiley - IEEE
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Page. NO
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1 online resource.
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ISBN
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9781118861899
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: 1118861892
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9781118861882
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1118861884
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9781118861844
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1118861841
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9781118861905 (hardback)
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Bibliographies/Indexes
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Includes bibliographical references and index
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Contents
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Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index
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Abstract
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"Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"--
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Subject
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Shielding (Electricity)
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Subject
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Electronic apparatus and appliances-- Design and construction.
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Subject
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Integrated circuits-- Design and construction.
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Subject
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Integrated circuits-- Protection.
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Subject
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Electrostatics.
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Subject
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Static eliminators.
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Dewey Classification
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537/.2
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LC Classification
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TK7867.8
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Added Entry
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Gossner, Harald.
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Added Entry
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Ohio Library and Information Network.
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