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" Code Optimization Techniques for Embedded Processors : "
by Rainer Leupers.
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BL
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| Record Number
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721064
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b540768
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| Main Entry
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by Rainer Leupers.
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| Title & Author
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Code Optimization Techniques for Embedded Processors : : Methods, Algorithms, and Tools\ by Rainer Leupers.
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| Publication Statement
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Boston, MA: Springer US, 2000
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| Page. NO
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(viii, 216 pages)
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| ISBN
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1441950109
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: 1475731698
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: 9781441950109
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: 9781475731699
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| Contents
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1. Introduction --;2. Memory Address Computation for DSPS --;3. Register Allocation for DSP Data Paths --;4. Instruction Scheduling for Clustered VLIW Processors --;5. Code Selection for Multimedia Processors --;6. Performance Optimization with Conditional Instructions --;7. Function Inlining under Code Size Constraints --;8. Frontend Issues --;The Lance System --;9. Conclusions --;Appendices --;A --;Experimental Result Tables --;B --;Example for the LANCE V2.0 IR --;References --;About the Author.
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| Abstract
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The building blocks of today's and future embedded systems are complex intellectual property components, or cores, many of which are programmable processors. Due to the need for efficient embedded systems, this overhead must be very low in order to make compilers useful in practice.
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Computer science.
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Computer-aided design.
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Software engineering.
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| LC Classification
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QA76.6B973 2000
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| Added Entry
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Rainer Leupers
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