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" Wafer-level chip-scale packaging : "
Shichun Qu, Yong Liu.
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BL
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| Record Number
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721192
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b540898
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| Main Entry
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Shichun Qu, Yong Liu.
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| Title & Author
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Wafer-level chip-scale packaging : : analog and power semiconductor applications\ Shichun Qu, Yong Liu.
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| Publication Statement
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New York: Springer, [2015]
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xvii, 322 pages : illustrations ; 24 cm
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| ISBN
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149391555X
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: 1493915568
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: 9781493915552
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: 9781493915569
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| Contents
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Chapter 1. Demand and challenges for wafer level chip-scale analog and power packaging --;Chapter 2. Fan-in wafer-level chip scale package --;Chapter 3. Fan-out wafer-level chip scale package --;Chapter 4. Stackable wafer level chip scale package --;Chapter 5. Wafer-level discrete power Mosfet package design --;Chapter 6. Wafer-level packaging TSV/Stack die for integration of analog and power solution --;Chapter 7. Thermal management, design, analysis for WLCSP --;Chapter 8. Electrical and multi-physics simulation for aAnalog and pPower WLCSP --;Chapter 9. WLCSP assembly --;Chapter 10. WLCSP typical reliability and test.
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| Abstract
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Analog and Power Wafer Level Chip Scale Packaging presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability and modeling.
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| Subject
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Chip scale packaging.
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| LC Classification
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TK7870.17S553 2015
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| Added Entry
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Shichun Qu
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Yong Liu
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