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" Parallel algorithm synthesis procedure for high -performance computer architectures. "
Ian N Dunn
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BL
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| Record Number
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723254
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b542968
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| Main Entry
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Ian N Dunn
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| Title & Author
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Parallel algorithm synthesis procedure for high -performance computer architectures.\ Ian N Dunn
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| Publication Statement
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[Place of publication not identified]: Springer, 2012
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| ISBN
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1441986502
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: 9781441986504
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| Contents
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1. Introduction. 2. Parallel Computing. 3. Parallel Algorithm Synthesis Procedure. 4. Review of Matrix Factorization. 5. Case Study 1: Parallel Fast Givens QR. 6. Case Study 2: Parallel Compact WY QR. 7. Case Study 3: Parallel Bidiagonalization. 8. Conclusion.
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| Added Entry
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Ian N Dunn
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