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" Verilog HDL : "
by Joseph Cavanagh.
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BL
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| Record Number
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727560
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b547294
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| Main Entry
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by Joseph Cavanagh.
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| Title & Author
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Verilog HDL : : digital design and modeling\ by Joseph Cavanagh.
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| Edition Statement
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First edition
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| Publication Statement
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Boca Raton, FL: CRC Press, 2007
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(920 pages) : 796 illustrations
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| ISBN
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1420051555
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: 9781420051551
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| Contents
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Chapter 1 Introduction --;chapter 2 Overview --;chapter 3 Language Elements --;chapter 4 Expressions --;chapter 5 Gate-Level Modeling --;chapter 6 User-Defined Primitives --;chapter 7 Dataflow Modeling --;chapter 8 Behavioral Modeling --;chapter 9 Structural Modeling --;chapter 10 Tasks and Functions --;chapter 11 Additional Design Examples --;chapter Appendix A: Event Queue --;chapter 51547 _C000b.indd 91/4/07 4:06:42 PM Appendix B Verilog Project Procedure --;chapter 2 Overview --;chapter 3 Language Elements --;chapter 4 Expressions --;chapter 5 Gate Level Modeling --;chapter 6 User-Defined Primitives --;chapter 7 Dataflow Modeling --;chapter 8 Behavioral Modeling --;chapter 9 Structural Modeling --;chapter 10 Tasks and Functions --;chapter 11 Additional Design Examples.
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| Abstract
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Emphasizing the detailed design of various Verilog projects, Verilog HDL: Digital Design and Modeling offers students a firm foundation on the subject matter. The textbook presents the complete Verilog language by describing different modeling constructs supported by Verilog and by providing numerous design examples and problems in each chapter. Examples include counters of different moduli, half adders, full adders, a carry lookahead adder, array multipliers, different types of Moore and Mealy machines, and much more. The text also contains information on synchronous and asynchronous sequential machines, including pulse-mode asynchronous sequential machines. In addition, it provides descriptions of the design module, the test bench module, the outputs obtained from the simulator, and the waveforms obtained from the simulator illustrating the complete functional operation of the design. Where applicable, a detailed review of the topic's theory is presented together with logic design principles, including state diagrams, Karnaugh maps, equations, and the logic diagram. Verilog HDL: Digital Design and Modeling is a comprehensive, self-contained, and inclusive textbook that carries all designs through to completion, preparing students to thoroughly understand this popular hardware description language.
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| Subject
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Digital electronics.
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Logic circuits -- Computer-aided design.
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Verilog (Computer hardware description language)
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| LC Classification
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TK7868.D5B956 2007
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CRC Press.
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Joseph Cavanagh
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