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" VLSI: "
edited by Ricardo Reis, Luc Claesen.
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BL
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| Record Number
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729863
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b549619
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| Main Entry
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edited by Ricardo Reis, Luc Claesen.
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| Title & Author
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VLSI: : Integrated Systems on Silicon : IFIP TC10 WG10.5 International Conference on Very Large Scale Integration 26-30 August 1997, Gramado, RS, Brazil\ edited by Ricardo Reis, Luc Claesen.
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| Publication Statement
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Boston, MA: Springer US : Imprint : Springer, 1997
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| Series Statement
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IFIP -- The International Federation for Information Processing
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| Page. NO
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(XIII, 570 pages)
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| ISBN
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0387353119
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: 1475769490
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: 9780387353111
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: 9781475769494
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| Contents
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One VLSI for Video and Image Processing --;1 A low-power H.263 video CoDec core dedicated to mobile computing --;2 A VLSI architecture for real time edge linking --;3 VLSI implementation of contour extraction from real time image sequences --;Two Microsystem and Mixed-mode Design --;4 An architecture for a 12 bits low power integrated CMOS pressure sensor with thermal compensation --;5 On-line testing of analog circuits by adaptive filters --;6 A multi-mode signature analyzer for analog and mixed circuits --;Three Communication and Memory System Design --;7 An all-digital single-chip symbol synchronizer and channel decoder for DVB --;8 An ATM switching element with programmable capacity --;9 Reconfigurable CPU cache memory design: fault tolerance and performance evaluation --;Four Low-voltage and Low-power Analog Circuits --;10 A low-voltage operational transconductance amplifier and its application to a bandpass Gm-C filter --;11 A programmable second generation SI integrator for low-voltage applications --;12 Low-voltage current-mode analogue continuous-time filters --;13 A set of device generators for analog and mixed-signal layout synthesis --;Five High Speed Circuit Techniques --;14 E-TSPC: extended true single-phase-clock CMOS circuit technique --;15 Noise and power programmability in semi-custom I/O buffers --;16 Charge pump DPLL to operate at high frequencies --;17 A 3.3 Gb/s sample circuit with GaAs MESFET technology and SCFL gates --;SIX Application Specific DSP Architectures --;18 An embedded accelerator for real world computing --;19 Design of a low power 108-bit conditional sum adder using energy economized pass-transistor logic (EEPL) --;20 A novel globally asynchronous locally synchronous sliding window DFT implementation --;21 Unfolded redundant CORDIC VLSI architectures with reduced area and power consumption --;Seven Specification and Simulation at System Level --;22 Multi-view design of asynchronous micropipeline systems using Rainbow --;23 High level synthesis of protocols by a formal description technique --;24 Matisse: a concurrent and object-oriented system specification language --;Eight Synthesis and Technology Mapping --;25 Library free technology mapping --;26 An implicit formulation for exact BDD minimization of incompletely specified functions --;27 Sequential logic optimization with implicit retiming and resynthesis --;28 Boolean mapping based on testing techniques --;Nine CAD Techniques for Low-power Design --;29 Testability analysis of circuits using data-dependent power management --;30 Data sequencing for minimum-transition transmission --;31 Spurious transitions in adder circuits: analytical modelling and simulations --;32 Power reduction through clock gating by symbolic manipulation --;Ten Physical Design Issues in Sub-micron Technologies --;33 A timing-driven floorplanning algorithm with the Elmore delay model for building block layout --;34 Efficient layout style for three-metal CMOS macro-cells --;35 Coupled circuit-interconnect modeling and simulation --;36 Accurate static timing analysis for deep submicronic CMOS circuits --;Eleven Architectural Design and Synthesis --;37 A time driven adder generator architecture --;38 User guided high level synthesis --;39 Empirical interconnect crosstalk characterization for high level synthesis --;40 Methods and tools for high and system level synthesis --;Twelve Testing in Complex Mixed Analog and Digital Systems --;41 A new frequency-domain analog test generation tool --;42 Boundary-scan testing for mixed-signal MCMs --;43 Stress testing: a low cost alternative for burn-in --;44 Non-Monte Carlo simulation and sensitivity of linear(ized) analog circuits under parameter variations --;45 Top-down design methodology and technology for Microsystems --;Index of Contributors --;Keyword Index.
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| Abstract
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The following topics are addressed: VLSI System Design and Applications Track * VLSI for Video and Image Processing. * Communication And Memory System Design * Cow-voltage & Low-power Analog Circuits.
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| Subject
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Computer science.
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Information storage and retrieval systems.
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| LC Classification
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TK7874.75E358 1997
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| Added Entry
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Luc Claesen
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Ricardo Reis
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