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" Reconfigurable computing: "
Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro C. Diniz (eds.).
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BL
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747875
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b567826
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| Main Entry
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Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro C. Diniz (eds.).
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| Title & Author
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Reconfigurable computing: : Architectures, tools and applications : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013 : proceedings\ Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro C. Diniz (eds.).
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| Publication Statement
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Berlin ; New York : Springer, ©2013.
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| Series Statement
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Lecture notes in computer science (En ligne), 7806.; LNCS sublibrary., SL 1,, Theoretical computer science and general issues (En ligne)
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(1 texte électronique).
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| ISBN
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3642368123
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: 9783642368127
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| Notes
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Titre de l'écran-titre (visionné le 7 mai 2013).
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| Contents
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Applications. Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications / Thomas C.P. Chau ... [et al.] --; Hardware Acceleration of Genetic Sequence Alignment / J. Arram ... [et al.] --; An FPGA Acceleration for the Kd-tree Search in Photon Mapping / Takuya Kuhara ... [et al.] --; SEU Resilience of DES, AES and Twofish in SRAM-Based FPGA / Uli Kretzschmar, Armando Astarloa, Jesús Lázaro --; A Fast Poisson Solver for Hybrid Reconfigurable System / Vitor Gomes, Haroldo Campos Velho, Andrea Charão --; An Architecture for IPv6 Lookup Using Parallel Index Generation Units / Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura --; Hardware Index to Set Partition Converter / Jon T. Butler, Tsutomu Sasao --; Teaching SoC Using Video Games to Improve Student Engagement / Christopher J. Martinez --; Arithmetic. Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-Based Custom Computing / Tomohiro Ueno ... [et al.]. Hardware Acceleration of Matrix Multiplication over Small Prime Finite Fields / Shane T. Fleming, David B. Thomas --; Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms / Geoffrey Ottoy ... [et al.] --; Design Optimization for FPGAs. Architecture for Transparent Binary Acceleration of Loops with Memory Accesses / Nuno Paulino, João Canas Ferreira, João M.P. Cardoso --; Parametric Optimization of Reconfigurable Designs Using Machine Learning / Maciej Kurek, Tobias Becker, Wayne Luk --; Performance Modeling of Pipelined Linear Algebra Architectures on FPGAs / Sam Skalicky ... [et al.] --; Architectures. Fast Template-Based Heterogeneous MPSoC Synthesis on FPGA / Youenn Corre ... [et al.] --; Configurable Fault-Tolerance for a Configurable VLIW Processor / Fakhar Anjam, Stephan Wong --; Hierarchical and Multiple Switching NoC with Floorplan Based Adaptability / Debora Matos ... [et al.]. Place and Routing. HTR: On-Chip Hardware Task Relocation for Partially Reconfigurable FPGAs / Aurelio Morales-Villanueva, Ann Gordon-Ross --; Performance Analysis and Optimization of High Density Tree-Based 3D Multilevel FPGA / Vinod Pangracious ... [et al.] --; Iterative Routing Algorithm of Inter-FPGA Signals for Multi-FPGA Prototyping Platform / Mariem Turki ... [et al.] --; Dependability-Increasing Method of Processors under a Space Radiation Environment / Yuya Shirahashi, Minoru Watanabe --; Ant Colony Optimization for Application Mapping in Coarse-Grained Reconfigurable Array / Li Zhou ... [et al.] --; C-Based Adaptive Stream Processing on Dynamically Reconfigurable Hardware: A Case Study on Window Join / Eric Shun Fukuda ... [et al.] --; Automatic Design Flow for Creating a Custom Multi-FPGA Board Netlist / Qingshan Tang ... [et al.] --; Pipeline Optimization for Loops on Reconfigurable Platform / Qi Guo ... [et al.]. FPGA-Based Adaptive Data Acquisition Scheduler-on-Chip (SchoC) for Heterogeneous Signals / Mohammed Abdallah --; High Level FPGA Modeling of an JPEG Encoder / Gabriel Nunez ... [et al.] --; Empirical Evaluation of Fixed-Point Arithmetic for Deep Belief Networks / Jingfei Jiang ... [et al.] --; Special Session: Research Projects in Reconfigurable and Embedded Computing (Extended Abstracts) --; Deriving Resource Efficient Designs Using the REFLECT Aspect-Oriented Approach / José G.F. Coutinho ... [et al.] --; Embedded Reconfigurable Architectures / Stephan Wong --; Algorithm Design Methodology for Embedded Architectures / Kiran Kumar Matam, Viktor K. Prasanna --; Efficient Hardware Based Security Algorithm Implementation for WSN Medical Applications: The ARMOR Perspective / Christos Antonopoulos, George Krikis, Nikolaos Voros --; Coarse Grained Parallelism Optimization for Multicore Architectures: The ALMA Project Approach / George Goulas ... [et al.].
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| Abstract
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This book constitutes the thoroughly refereed conference proceedings of the 9th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2013, held in Los Angeles, CA, USA, in March 2013. The 28 revised papers presented, consisting of 20 full papers and 11 poster papers were carefully selected from 41 submissions. The topics covered are applications, arithmetic, design optimization for FPGAs, architectures, place and routing.--[Source inconnue].
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| Subject
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Computer hardware.
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Computer network architectures.
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Computer science.
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| LC Classification
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QA76.9.A3P455 2013
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| Added Entry
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José Gabriel de Figueiredo Coutinho
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Pedro C Diniz
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Philip Brisk
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ARC 2013
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