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" Process and Device Simulation for MOS-VLSI Circuits "
edited by Paolo Antognetti, Dimitri A. Antoniadis, Robert W. Dutton, William G. Oldham.
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BL
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| Record Number
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773767
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b593761
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| Main Entry
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edited by Paolo Antognetti, Dimitri A. Antoniadis, Robert W. Dutton, William G. Oldham.
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| Title & Author
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Process and Device Simulation for MOS-VLSI Circuits\ edited by Paolo Antognetti, Dimitri A. Antoniadis, Robert W. Dutton, William G. Oldham.
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| Publication Statement
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Dordrecht : Springer Netherlands, 1983
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| Series Statement
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NATO ASI series., Series E,, Applied sciences ;, 62.
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(636 pages)
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| ISBN
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9400968426
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: 9400968442
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: 9789400968424
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: 9789400968448
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| Contents
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Diffusion in Silicon --; Thermal Oxidation: Kinetics, Charges, Physical Models, and Interaction with Other Processes in VLSI Devices --; The Use of Chlorinated Oxides and Intrinsic Gettering Techniques for VLSI Processing --; Ion Implantation --; Beam Annealing of Ion Implanted Silicon --; Materials Characterization --; Modeling of Polycrystalline Silicon Structures for Integrated Circuit Fabrication Processes --; Two-Dimensional Process Simulation --; Supra --; Numerical Simulation of Impurity Redistribution Near Mask Edges --; Optical and Deep UV Lithography --; Wafer Topography Simulation --; Analyses of Nonplanar Devices --; Two Dimensional MOS-Transistor Modeling --; Fielday --; Finite Element Device Analyses.
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| Abstract
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P. Antognetti University of Genova, Italy Director of the NATO ASI The key importance of VLSI circuits is shown by the national efforts in this field taking place in several countries at differ ent levels (government agencies, private industries, defense de partments). As a result of the evolution of IC technology over the past two decades, component complexi ty has increased from one single to over 400,000 transistor functions per chip. Low cost of such single chip systems is only possible by reducing design cost per function and avoiding cost penalties for design errors. Therefore, computer simulation tools, at all levels of the design process, have become an absolute necessity and a cornerstone in the VLSI era, particularly as experimental investigations are very time-consuming, often too expensive and sometimes not at all feasible. As minimum device dimensions shrink, the need to understand the fabrication process in a quanti tati ve way becomes critical. Fine patterns, thin oxide layers, polycristalline silicon interco~ nections, shallow junctions and threshold implants, each become more sensitive to process variations. Each of these technologies changes toward finer structures requires increased understanding of the process physics. In addition, the tighter requirements for process control make it imperative that sensitivities be unde~ stood and that optimation be used to minimize the effect of sta tistical fluctuations.
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Computer engineering.
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Engineering.
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Systems engineering.
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| LC Classification
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TK7888.4E358 1983
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Dimitri A Antoniadis
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Paolo Antognetti
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Robert W Dutton
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William G Oldham
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| Parallel Title
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Proceedings of the NATO Advanced Study Institute on Process and Device Simulation for MOS-VLSI Circuits, Sogesta, Urbino, Italy, July 12-23, 1982
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