| Document Type
|
:
|
BL
|
| Record Number
|
:
|
882340
|
| Main Entry
|
:
|
Schmidt, Christian.
|
| Title & Author
|
:
|
Interleaving Concepts for Digital-To-Analog Converters : : Algorithms, Models, Simulations and Experiments.
|
| Publication Statement
|
:
|
Wiesbaden :: Springer Vieweg. in Springer Fachmedien Wiesbaden GmbH,, 2019.
|
| Page. NO
|
:
|
1 online resource (268 pages)
|
| ISBN
|
:
|
3658272643
|
|
|
:
|
: 9783658272647
|
|
|
:
|
3658272635
|
|
|
:
|
9783658272630
|
| Notes
|
:
|
5.11.1 Simulation Setup
|
| Contents
|
:
|
Intro; Foreword; Acknowledgement; Table of Contents; List of Figures; List of Tables; List of Symbols; List of Acronyms; Zusammenfassung; Abstract; 1 Introduction; 1.1 Motivation; 1.2 State of the Art; 1.3 Objectives; 1.4 Structure of the Thesis and Main Contributions; 2 DAC: Fundamentals and Interleaving Concepts; 2.1 State of the Art DAC Realizations; 2.2 Manufacturing Technologies; 2.3 DAC Architectures; 2.4 Nyquist Rate DAC ZOH Operation; 2.5 DAC Performance Impairments; 2.5.1 Static Performance; 2.5.2 Dynamic Performance; 2.5.3 Quantization Noise; 2.5.4 Phase Noise and Jitter
|
|
|
:
|
2.5.5 Thermal Noise2.6 DAC Interleaving Concepts; 2.7 Analog Components for DAC Interleaving Concepts; 2.7.1 Mixer; 2.7.2 Frequency Multiplexer; 2.7.3 Analog Multiplexer; 3 Time Interleaving DAC (TI-DAC); 3.1 Concept; 3.2 Mathematical Model; 3.2.1 TI-DAC with RZ Pulses; 3.2.2 TI-DAC with NRZ Pulses; 3.3 Pre-Processing Filter for TI-DAC with NRZ Pulses; 3.4 Characteristics and Limitations; 3.5 Conclusion; 4 Analog Multiplexing DAC (AMUX-DAC); 4.1 Introduction; 4.2 Concept; 4.3 Analytical System Model; 4.3.1 General Model; 4.3.2 Special Case for Two DACs; 4.4 Signal Processing
|
|
|
:
|
4.10.2 On-Chip Time Domain Measurement4.10.3 Discussion of Results; 4.11 Scaling Model; 4.12 Limitations and Challenges; 4.13 Summary; 5 Frequency Interleaving DAC (FI-DAC); 5.1 Introduction; 5.2 Block Diagram and Spectral Illustration; 5.3 Brief Analytical System Description; 5.4 Mathematical Framework; 5.4.1 Definitions; 5.4.2 Distribution of Data Samples; 5.4.3 Local Oscillator Frequencies; 5.4.4 Feasible Symbol Rates; 5.5 Parameter Balancing; 5.5.1 Standard FI-DAC Optimization Program; 5.5.2 Extended FI-DAC Optimization Program; 5.6 Parameter Balancing Examples
|
|
|
:
|
4.4.1 Synchronization and Clocking4.4.2 Digital Signal Processing; 4.5 AMUX-DAC Impairment Model; 4.6 Behavioral 2:1 AMUX Model; 4.6.1 2:1 AMUX IC; 4.6.2 Block Diagram; 4.6.3 Parameter Fitting; 4.7 Simulation Setup; 4.8 Impact of AMUX Parameter Variations; 4.8.1 Data LPF In Bandwidth; 4.8.2 Clock LPF Bandwidth; 4.8.3 Clock Duty Cycle Mismatch; 4.9 Impact of AMUX-DAC Parameter Variations; 4.9.1 Reference Case; 4.9.2 DAC Bandwidth; 4.9.3 Combined vs. MIMO Pre-Equalization; 4.9.4 Phase Noise; 4.10 2:1 AMUX Experimental Results; 4.10.1 On-Chip S-Parameter Measurement
|
|
|
:
|
5.6.1 Standard FI-DAC Optimization Program Example5.6.2 Extended FI-DAC Optimization Program Example; 5.7 Digital Signal Processing for FI-DAC; 5.7.1 Block Diagram; 5.7.2 MIMO System Model for two DACs; 5.7.3 Algorithms; 5.7.4 MIMO Algorithm; 5.7.5 Calibration; 5.7.6 Sub-Signal Characteristics; 5.8 Initial Experiments with MHz-DACs; 5.9 FI-DAC Impairment Model; 5.10 Experiments with GHz-DACs; 5.10.1 Overview on Signal Processing for Two DACs; 5.10.2 Digital Signal Processing for Two DACs; 5.10.3 Initial Experiment; 5.10.4 Improved Experiment; 5.11 System Parameter Impact on Performance
|
| LC Classification
|
:
|
TK7876-7876.42TK7888
|