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BL
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| Record Number
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890672
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| Title & Author
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Electronic device architectures for the nano-CMOS era : : from ultimate CMOS scaling to beyond CMOS devices /\ editor, Simon Deleonibus.
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| Publication Statement
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Singapore :: Pan Stanford,, ©2009.
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| Page. NO
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1 online resource (xiv, 425 pages) :: illustrations (some color)
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| ISBN
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0429086334
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: 0429533624
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: 042954832X
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: 9780429086335
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: 9780429533624
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: 9780429548321
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: 9789814241298
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: 9814241296
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9789814241281
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9814241288
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| Bibliographies/Indexes
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Includes bibliographical references and index.
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| Contents
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Ch. 1. Physical and technological limitations of NANOCMOS devices to the end of the roadmap and beyond / Simon Deleonibus [and others] -- ch. 2. Advanced CMOS devices on bulk and SOI : physics, modeling and characterization / Thierry Poiroux and Gilles Le Carval -- ch. 3. Devices structures and carrier transport properties of advanced CMOS using high mobility channels / Shinichi Takagi [and others] -- ch. 4. High-K gate dielectrics / Hei Wong [and others] -- ch. 5. Fabrication of source and drain : ultra shallow junction / Bunji Mizuno -- ch. 6. New interconnect schemes : end of copper, optical interconnects? / Suzanne Laval [and others] -- ch. 7. Technologies and key design issues for memory devices / Kinam Kim and Gitae Jeong -- ch. 8. FeRAM and MRAM technologies / Yoshihiro Arimoto -- ch. 9. Advanced charge storage memories : from silicon nanocrystals to molecular devices / Barbara De Salvo and Gabriel Molas -- ch. 10. Single electron devices and applications / Jacques Gautier, Xavier Jehl, and Marc Sanquer -- ch. 11. Electronic properties of organic monolayers and molecular devices / Dominique Vuillaume -- ch. 12. Carbon nanotube electronics / Vincent Derycke, Arianna Filoramo and Jean-Philippe Bourgoin -- ch. 13. Spin electronics / Kyung-Jin Lee and Sang Ho Lim -- ch. 14. The longer term : quantum information processing and communication / Philippe Jorrand.
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| Abstract
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In this book, internationally recognized researchers give a state-of-the-art overview of the electronic device architectures required for the nano-CMOS era and beyond. Challenges relevant to the scaling of CMOS nanoelectronics are addressed through different core CMOS and memory device options in the first part of the book. The second part reviews new device concepts for nanoelectronics beyond CMOS. The book covers the fundamental limits of core CMOS, improving scaling by the introduction of new materials or processes,new architectures using SOI, multigates and multichannels, and quantum computing.
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| Subject
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Metal oxide semiconductors, Complementary.
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Nanoelectronics.
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COMPUTERS-- Logic Design.
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Metal oxide semiconductors, Complementary.
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Nanoelectronics.
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SCIENCE / Life Sciences / General
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TECHNOLOGY ENGINEERING-- Electronics-- Circuits-- Logic.
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TECHNOLOGY ENGINEERING-- Electronics-- Circuits-- VLSI ULSI.
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TECHNOLOGY / Electronics / General
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TECHNOLOGY / Material Science
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| Dewey Classification
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621.39/5
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| LC Classification
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TK7871.99.M44E44 2009eb
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| Added Entry
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Deleonibus, Simon.
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