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" VLSI design and test : "
S. Rajaram, N.B. Balamurugan, D. Gracia Nirmala Rani, Virendra Singh (eds.).
Document Type
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BL
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Record Number
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891181
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Main Entry
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VDAT (Symposium)(22nd :2018 :, Madurai, India)
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Title & Author
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VLSI design and test : : 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised selected papers /\ S. Rajaram, N.B. Balamurugan, D. Gracia Nirmala Rani, Virendra Singh (eds.).
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Publication Statement
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Singapore :: Springer,, 2019.
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Series Statement
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Communications in computer and information science,; 892
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Page. NO
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1 online resource (xviii, 722 pages) :: illustrations (some color)
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ISBN
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9789811359507
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: 9811359504
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9789811359491
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Notes
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Includes author index.
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Contents
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Digital design -- Analog and mixed signal design -- Hardware security -- Micro bio-fluidics -- VLSI testing -- Analog circuits and devices -- Network-on-chip -- Memory -- Quantum computing and NoC -- Sensors and interfaces.
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Abstract
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This book constitutes the refereed proceedings of the 22st International Symposium on VLSI Design and Test, VDAT 2018, held in Madurai, India, in June 2018. The 39 full papers and 11 short papers presented together with 8 poster papers were carefully reviewed and selected from 231 submissions. The papers are organized in topical sections named: digital design; analog and mixed signal design; hardware security; micro bio-fluidics; VLSI testing; analog circuits and devices; network-on-chip; memory; quantum computing and NoC; sensors and interfaces.
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Subject
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Integrated circuits-- Very large scale integration-- Design and construction, Congresses.
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Subject
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Integrated circuits-- Very large scale integration-- Testing, Congresses.
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Subject
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Integrated circuits-- Very large scale integration-- Design and construction.
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Subject
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Integrated circuits-- Very large scale integration-- Testing.
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Dewey Classification
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621.39/5
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LC Classification
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TK7874.75
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Added Entry
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Balamurugan, N. B.
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Gracia Nirmala Rani, D.
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Rajaram, S.,1973-
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Singh, Virendra, (Associate professor of electrical engineering)
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Parallel Title
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VDAT 2018
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