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BL
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| Record Number
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891629
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| Main Entry
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Jayanthy, S.
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| Title & Author
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Test generation of crosstalk delay faults in VLSI circuits /\ S. Jayanthy, M.C. Bhuvaneswari.
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| Publication Statement
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Singapore :: Springer,, [2019].
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| Page. NO
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1 online resource (xi, 156 pages) :: illustrations (some color)
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| ISBN
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9789811324932
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: 9789811324949
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: 9789811347849
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: 981132493X
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: 9811324948
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: 9811347840
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9789811324925
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9811324921
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| Bibliographies/Indexes
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Includes bibliographical references.
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| Contents
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Chapter 1. Background and Review of Crosstalk Delay Fault Models and the Crosstalk Effects -- Chapter 2. Review of Test Generation Techniques for Crosstalk Delay Faults -- Chapter 3. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Modified PODEM and FAN Algorithm -- Chapter 4. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults using Single-Objective Genetic Algorithm -- Chapter 5. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Single-Objective Particle Swarm Optimization -- Chapter 6. Simulation of Asynchronous Sequential Circuits using Fuzzy Delay Model -- Chapter 7. Simulation Based Test Generation for Crosstalk Delay Faults in Asynchronous Sequential Circuits.
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| Abstract
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This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.
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| Subject
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Crosstalk.
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| Subject
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Integrated circuits-- Very large scale integration-- Testing.
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Algorithms data structures.
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Circuits components.
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Computer architecture logic design.
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Crosstalk.
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Integrated circuits-- Very large scale integration-- Testing.
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Systems analysis design.
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TECHNOLOGY ENGINEERING / Mechanical
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Circuits and Systems.
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Control Structures and Microprogramming.
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Logic Design.
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| Subject
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Performance and Reliability.
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| Dewey Classification
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621.39/5
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| LC Classification
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TK7874.75
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| Added Entry
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Bhuvaneswari, M. C.
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