| Document Type
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BL
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| Record Number
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946276
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| Doc. No
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b700646
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| Main Entry
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Wei, Yayi.
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| Title & Author
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Advanced processes for 193-nm immersion lithography /\ Yayi Wei, Robert L. Brainard.
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| Publication Statement
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Bellingham, Wash. :: SPIE,, ©2009.
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| Series Statement
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SPIE Press monograph ;; PM189
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| Page. NO
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1 online resource (xix, 315 pages) :: illustrations
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| ISBN
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0819478431
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: 9780819478436
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0819475572
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9780819475572
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| Notes
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"SPIE digital library."
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| Bibliographies/Indexes
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Includes bibliographical references and index.
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| Contents
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Immersion lithography and its challenges -- Process steps in the track -- Resist leaching and water uptake -- Contact angle of water on resist stacks -- Topcoat and resist processes for immersion lithography -- Immersion defects and defect-reduction strategies -- Antireflection coatings and underlayer technology -- Resist shrink and trim processes -- Double exposure and double patterning -- Line-edge roughness of resist patterns -- Extendibility of 193-nm immersion lithography.
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| Abstract
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This book is a comprehensive guide to advanced processes and materials used in 193-nm immersion lithography (193i). It is an important text for those new to the field as well as for current practitioners who want to broaden their understanding of this latest technology. The book can be used as course material for graduate students of electrical engineering, material sciences, physics, chemistry, and microelectronics engineering and can also be used to train engineers involved in the manufacture of integrated circuits. It provides techniques for selecting critical materials (topcoats, photoresists, and antireflective coatings) and optimizing immersion processes to ensure higher performance and lower defectivity at lower cost. This book also includes sections on shrinking, trimming, and smoothing of the resist pattern to reduce feature sizes and line-edge roughness. Finally, it describes the recent development of 193i in combination with double exposure and double patterning.
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| Subject
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Immersion lithography.
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| Subject
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Integrated circuits-- Design and construction.
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Semiconductors-- Etching.
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Immersion lithography.
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Integrated circuits-- Design and construction.
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| Subject
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Semiconductors-- Etching.
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| Dewey Classification
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621.3815/31
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| LC Classification
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TK7872.M3W45 2009e
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| Added Entry
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Brainard, Robert L.
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| Added Entry
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Society of Photo-optical Instrumentation Engineers.
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